/*********************************************************************/ /* Copyright 1989 by H. Edward Hall */ /* */ /* Permission is hereby granted to copy and to give away this */ /* software as long as this notice is preserved in its entirety. */ /* You may modify the software or use it for any purpose just as */ /* long as you preserve this notice and do not sell the software. */ /* No warranty of any kind is made for this software. The holder */ /* of this copyright reserves the right to enhance and/or sell */ /* this software with no obligation to provide updates or further */ /* free copies; if this should happen you may still use this version */ /* of the software under the terms you received it with. */ /*********************************************************************/ /* * Roland MPU-401 header file; see MPU-401 Tech Manual */ /* * MPU marks */ #define NOOP 0xf8 #define MEASURE_END 0xf9 #define DATA_END 0xfc /* * MPU Track data request messages */ #define REQ_TRACK1 0xf0 #define REQ_TRACK2 0xf1 #define REQ_TRACK3 0xf2 #define REQ_TRACK4 0xf3 #define REQ_TRACK5 0xf4 #define REQ_TRACK6 0xf5 #define REQ_TRACK7 0xf6 #define REQ_TRACK8 0xf7 #define REQ_CONDUCT 0xf9 /* * Misc. MPU messages */ #define TIME_OVERFLOW 0xf8 #define ALL_END 0xfc #define CLOCK_TO_HOST 0xfd #define ACK 0xfe #define SYS_MESSAGE 0xff /* * MPU commands elements */ #define M_STOP 0x01 #define M_START 0x02 #define M_CONT 0x03 #define P_STOP 0x04 #define P_START 0x08 #define R_STOP 0x10 #define R_START 0x20 /* * common MPU command combinations */ #define STOP_PLAY (M_STOP|P_STOP) #define START_PLAY (M_START|P_START) #define STOP_REC (M_STOP|R_STOP) #define START_REC (M_START|R_START) #define STOP_OVERDUB (M_STOP|P_STOP|R_STOP) #define START_OVERDUB (M_START|P_START|R_START) /* * Other Misc MPU mode commands */ #define ALL_NOTES_OFF 0x30 #define NO_REAL_TIME 0x32 #define CHAN_THRU_OFF 0x33 #define WITH_TIME_BYTE 0x34 #define MODE_MESS_THRU 0x35 #define EXCLUSIVE_THRU 0x36 #define COMMMON_THRU 0x38 #define REAL_TIME_THRU 0x39 #define UART 0x3f /* * Set up channel ref table */ #define CHSET_A(x) (0x40|(x)) #define CHSET_B(x) (0x50|(x)) #define CHSET_C(x) (0x60|(x)) #define CHSET_D(x) (0x70|(x)) #define INTERNAL_CLOCK 0x80 #define FSK_CLOCK 0x81 #define MIDI_CLOCK 0x82 #define METRO_ON 0x83 #define METRO_OFF 0x84 #define METRO_ON_W_AC 0x85 #define BEND_OFF 0x86 #define BEND_ON 0x87 #define THRU_OFF 0x88 #define THRU_ON 0x89 #define DAT_IN_STP_OFF 0x8a #define DAT_IN_STP_ON 0x8b #define MEASURE_OFF 0x8c #define MEASURE_ON 0x8d #define CONDUCTOR_OFF 0x8e #define CONDUCTOR_ON 0x8f #define REAL_TIME_OFF 0x90 #define REAL_TIME_ON 0x91 #define FSK_INTERNAL 0x92 #define FSK_MIDI 0x93 #define CLOCK_OFF 0x94 #define CLOCK_ON 0x95 #define EXCLUSIVE_OFF 0x96 #define EXCLUSIVE_ON 0x97 /* * turn reference tables on/off */ #define CHAN_A_OFF 0x98 #define CHAN_A_ON 0x99 #define CHAN_B_OFF 0x9a #define CHAN_B_ON 0x9b #define CHAN_C_OFF 0x9c #define CHAN_C_ON 0x9d #define CHAN_D_OFF 0x9e #define CHAN_D_ON 0x9f /* * MPU counter requests */ #define REQ_PLAY_CNT1 0xa0 #define REQ_PLAY_CNT2 0xa1 #define REQ_PLAY_CNT3 0xa2 #define REQ_PLAY_CNT4 0xa3 #define REQ_PLAY_CNT5 0xa4 #define REQ_PLAY_CNT6 0xa5 #define REQ_PLAY_CNT7 0xa6 #define REQ_PLAY_CNT8 0xa7 #define REQ_RECORD_CNT 0xab /* * Misc MPU requests */ #define REQ_VER 0xac #define REQ_REV 0xad #define REQ_TEMPO 0xaf /* * MPU Resets/clears */ #define RES_RTEMPO 0xb1 #define CLR_PLAY_CNTS 0xb8 #define CLR_PLAY_MAP 0xb9 #define CLR_RECORD_CNT 0xba /* * MPU timebases */ #define TBASE48 0xc2 #define TBASE72 0xc3 #define TBASE96 0xc4 #define TBASE120 0xc5 #define TBASE144 0xc6 #define TBASE168 0xc7 #define TBASE192 0xc8 #define WANT_DATA1 0xd0 #define WANT_DATA2 0xd1 #define WANT_DATA3 0xd2 #define WANT_DATA4 0xd3 #define WANT_DATA5 0xd4 #define WANT_DATA6 0xd5 #define WANT_DATA7 0xd6 #define WANT_DATA8 0xd7 #define WANT_SYSMESS 0xdf /* * set MPU conditions and values * (followed by data byte) */ #define SET_TEMPO 0xe0 #define SET_RTEMPO 0xe1 #define SET_GRADUATION 0xe2 #define MIDCLK_PER_MET 0xe4 #define METRO_MEAS 0xe6 #define INT_HOST_CLK 0xe7 #define ACTIVE_TRACK 0xec #define SEND_PCOUNT 0xed #define CHAN_1_8_ON 0xee #define CHAN_9_11_ON 0xef /* * MPU master reset */ #define RESET 0xff /* * Hardware details */ #define DATA_PORT 0x330 #define STATUS_PORT 0x331 #define INTERRUPT 0x02 /* * Status register bits */ #define DRR 0x40 #define RDY 0x80