VENDOR = ATI
MODEL = VGA Wonder Revision 4
MONITOR = Any
SERVER = SVGA
#
#    model best determined by message printed to screen at power on.
#
WIDTH = 640
HEIGHT = 480
PLANES = 8
PHYSWIDTH = 640
PHYSHEIGHT =  480
CLASS = 8
CHIPSET = ati
ATIREV = 2
#
#
[SVPMI_QUICK_GRAPHICS]

	inb(r63, 0x3DA);						// reset attr F/F
	outb(0x3C0, 0);							// disable palette
	outb(0x3D4, 0x11);	outb(0x3D5, 0);		// unprotect crtc regs 0-7


r0 = 0x01; r1 = 0x1; r2 = 0xf; r3 = 0x0;
r4 = 0xa
boutb(5, 0x3C4, 0x3C5);

outb(0x3C2, 0xe3);
r0 = 3;
boutb(1, 0x3C4, 0x3C5);

r0 = 0x5f; r1 = 0x4f; 
r2 = 0x50; r3 = 0x82; r4 = 0x55; r5 = 0x81; 
r6 = 0xb; r7 = 0x3e; r8 = 0x0; r9 = 0x40; 
r10 = 0x0; r11 = 0x0; r12 = 0x0; r13 = 0x0; 
r14 = 0x0; r15 = 0x0; r16 = 0xea; r17 = 0x8c; 
r18 = 0xdf; r19 = 0x28; r20 = 0x0; r21 = 0xe7; 
r22 = 0x4; r23 = 0xe3; r24 = 0xff; 
boutb(25, 0x3D4, 0x3D5);

outb( 0x1ce, 0xb0); inb( r1, 0x1cf); and( r1, 0xc1); or( r1, 0x30);
shl( r1, 8); or( r1, 0xb0);
outw( 0x1ce, r1);
outb( 0x1ce, 0xb1); inb( r1, 0x1cf); and( r1, 0x87); or( r1, 0x0);
shl( r1, 8); or( r1, 0xb1);
outw( 0x1ce, r1);
outb( 0x1ce, 0xbe); inb( r1, 0x1cf); and( r1, 0xe5); or( r1, 0x0);
shl( r1, 8); or( r1, 0xbe);
outw( 0x1ce, r1);
outb( 0x1ce, 0xb5); inb( r1, 0x1cf); and( r1, 0x7f); or( r1, 0x0);
shl( r1, 8); or( r1, 0xb5);
outw( 0x1ce, r1);
outb( 0x1ce, 0xb6); inb( r1, 0x1cf); and( r1, 0xe7); or( r1, 0x0);
shl( r1, 8); or( r1, 0xb6);
outw( 0x1ce, r1);
outb( 0x1ce, 0xb8); inb( r1, 0x1cf); and( r1, 0x3f); or( r1, 0x40);
shl( r1, 8); or( r1, 0xb8);
outw( 0x1ce, r1);
outb( 0x1ce, 0xb3); inb( r1, 0x1cf); and( r1, 0xaf); or( r1, 0x0);
shl( r1, 8); or( r1, 0xb3);
outw( 0x1ce, r1);
outb( 0x3CC, 0); outb( 0x3CA, 1);
r0 = 0x80; r1 = 0x20; 
r2 = 0x0; r3 = 0x0; r4 = 0x0; r5 = 0x0; 
r6 = 0x5; r7 = 0xf; r8 = 0xff; boutb(9, 0x3CE, 0x3CF);

inb(r63, 0x3DA);

r0 = 0x00; r1 = 0x01; r2 = 0x02; r3 = 0x03;
r4 = 0x04; r5 = 0x05; r6 = 0x14; r7 = 0x07;
r8 = 0x08; r9 = 0x09; r10= 0x0A; r11= 0x0B;
r12= 0x0C; r13= 0x0D; r14= 0x0E; r15= 0x0F;
r16= 0x1; r17= 0x0; r18= 0xf; r19= 0x0;
r20= 0x0;
boutb( 21, 0x3C0, 0x3C0);
outb( 0x3C0, 0x20 ); 



[SVPMI_QUICK_TEXT]


	normalize();
	inb(r63, 0x3DA);						// reset attr F/F
	outb(0x3C0, 0);							// disable palette
	outb(0x3D4, 0x11);	outb(0x3D5, 0);		// unprotect crtc regs 0-7

	// Reset and set sequencer regs

	r0 = 0x01;	r1 = 0x01;	r2 = 0x03;	r3 = 0x00;
	r4 = 0x02;
	boutb(5, 0x3C4, 0x3C5);					// reset, seq regs

	// set misc out reg

	outb(0x3C2, 0x63);

	r0 = 0x03;
	boutb(1, 0x3C4, 0x3C5);					// sequencer enable

	// set all crtc regs

	r0 = 0x5F;	r1 = 0x4F;	r2 = 0x50;	r3 = 0x82;
	r4 = 0x55;	r5 = 0x81;	r6 = 0xBF;	r7 = 0x1F;
	r8 = 0x00;	r9 = 0x4F;	r10= 0x06;	r11= 0x07;
	r12= 0x00;	r13= 0x00;	r14= 0x00;	r15= 0x59;
	r16= 0x9C;	r17= 0x8E;	r18= 0x8F;	r19= 0x28;
	r20= 0x1F;	r21= 0x96;	r22= 0xB9;	r23= 0xA3;
	r24= 0xFF;
	boutb(25, 0x3D4, 0x3D5);

	// set all graphics controller regs

	outb( 0x3CC, 0);	outb( 0x3CA, 1);

	r0 = 0x00;	r1 = 0x00;	r2 = 0x00;	r3 = 0x00;
	r4 = 0x00;	r5 = 0x10;	r6 = 0x0E;	r7 = 0x00;
	r8 = 0xFF;
	boutb(9, 0x3CE, 0x3CF);

	// set all attribute regs

	inb(r63, 0x3DA);						// reset flip/flop
	r0 = 0x00;	r1 = 0x01;	r2 = 0x02;	r3 = 0x03;
	r4 = 0x04;	r5 = 0x05;	r6 = 0x14;	r7 = 0x07;
	r8 = 0x38;	r9 = 0x39;	r10= 0x3A;	r11= 0x3B;
	r12= 0x3C;	r13= 0x3D;	r14= 0x3E;	r15= 0x3F;
	r16= 0x0C;	r17= 0x00;	r18= 0x0F;	r19= 0x08;
	r20= 0x00;
	boutb( 21, 0x3C0, 0x3C0);

	outb( 0x3C0, 0x20 );					// enable palette

[SVPMI_QUICK_TEXT]

	int10( 0x3, 0x0 ) ;
